Phase-change memory is promising as a next-generation non-volatile memory (hereinafter, abbreviated as PCRAM: Phase-Change Random Access Memory) because it is superior in scaling of element size and endurance. However, PCRAM has a problem of high reset current.
To solve this problem, superlattice phase-change memory (hereinafter, abbreviated as SL phase-change memory) composed of GeTe(111)/Sb2Te3(001) superlattice film and called “interfacial Phase-Change Memory (iPCM)” has been suggested. Such a SL phase-change memory, as compared with PCRM an operation mechanism of which is phase-changes between “amorphous” and “crystal”, can reduce switching power to about one tenth ( 1/10) according to first-principle computer simulations and verification experiments.
According to Simpson et al., Nature Nanotechnology 6, 401 (2011) (Non-Patent Document 1), Tominaga et al., Proceeding of the IEEE International Electron Device Meeting, San Francisco (2010), pp. 22.3.1-22.3.4 (Non-Patent Document 2) and Japanese Patent Application Laid-Open Publication No. 2010-263131 (Patent Document 1), operation principle of the SL phase-change memory using a superlattice formed of GeTe(111) and Sb2Te3(001) is to reversibly change Ge atoms between “the octahedral sites (or 6-fold bond state)” and “the tetrahedral sites (or 4-fold bond state)” by an applied voltage or current. This change will be called “Ge switching” in the present specification. In addition, the SL phase-change memory using a superlattice formed of GeTe(111) and Sb2Te3(001) will be called in a simple manner as GeTe(111)/Sb2Te3(001).
These Documents mentioned above disclose that, since the SL phase-change memory exhibits a low resistance when Ge atoms are at the octahedral sites while it exhibits a high resistance when Ge atoms are at tetrahedral sites, it is possible to make the SL phase-change memory function in a set state when it is in a low-resistance state and function in a reset state when it is in a high-resistance state. That is, by the SL phase-change memory, information can be memorized by making a correspondence between the low-resistance state and the low-resistance state and “0” and “1”, which are digital values, respectively.
According to these Documents mentioned above, a Sb2Te3(001) layer is formed by layer-by-layer deposition of a Te (tellurium) layer and a Sb (antimony) layer in Sb2Te3[001] except for a Te—Te weak bond portion where a van der Waals gap layer is present. On the other hand, the GeTe(111) layer is formed by layer-by-layer deposition of a Te layer and a Ge (germanium) layer except for a deposited portion of a Te layer-Te layer where a vacancy layer exists.
Further, Patent Document 1 mentioned above discloses that, upon “Ge switching”, lattice (or crystalline lattice) modification between the 6-fold bond state of Ge atoms in which the deposited state in GeTe[111] direction is “—Ge layer-Te layer-vacancy layer-Te layer-Ge layer-” and the 4-fold bond state of Ge atoms in which the deposited state in GeTe[111] direction is “—Te layer-Ge layer-vacancy layer-Ge layer-Te layer-” is induced and it enables a low switching power of the SL phase-change memory. Here, the 6-fold bond state of Ge atoms corresponds to the low-resistance state and the 4-fold bond state of Ge atoms corresponds to the high-resistance state.